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Shunchen Shi

Computer Architecture, Processing in Memory

I am Shunchen Shi (史舜晨), a 3rd year PhD student at ICT, CAS, advised by Prof.Ninghui Sun and Prof. Xueqi Li. My interests are domain specific accelerator, processing-in-memory, parallel computing and IC Design

Google Scholar

Education

University of Electronic Science and Technology of China B.E. in Electrical and Electronic Engineering (2018.9 — 2022.7)

Institute of Computing Technology, Chinese Academy of Sciences PhD Student (2022.9 — Present)

Publication

[ISCA'25 Workshop on Arch4EAI] Shunchen Shi, Xueqi Li, Ninghui Sun, Mixed-Precision Processing-in-Memory Architecture for Edge Device LLM Inference, 2025 (CCF-A Workshop) [paper]
[ISLPED'25 Poster] Fan Yang, Shunchen Shi, Peiheng Zhang, Xueqi Li, upGEMV: A Bandwidth-Efficient and Scalable GEMV Accelerator for PIM Systems, 2025 (CCF-C) [paper]
[CAL'25] Shunchen Shi, Fan Yang, Zhichun Li, Xueqi Li, Ninghui Sun, Exploring the DIMM PIM Architecture for Accelerating Time Series Analysis, 2025 [paper]
[CRAD'25] Ruihao Gao, Shunchen Shi, Xueqi Li, Guangming Tan, BeeZip2: High Performance Lossless Data Compression Domain-Specific Accelerator, 2025 (CCF-A) [paper]
[ICCD'24] Shunchen Shi, Xueqi Li, Zhaowu Pan, Peiheng Zhang, Ninghui Sun, CoPIM: A Collaborative Scheduling Framework for Commodity Processing-in-memory Systems, 2024 (CCF-B) [paper]
[SC'23] Jianxiong Li, Tong Zhao, Zhuoqiang Guo, Shunchen Shi, Lijun Liu, Guangming Tan, Weile Jia, Guojun Yuan, Zhan Wang Enhance the Strong Scaling of LAMMPS on Fugaku, 2023 (CCF-A) [paper]
[BIBM'23] Di Xu, Peiheng Zhang, Yang Zhang, Shunchen Shi, Xueqi Li TransCaller: An End-to-end Accelerated Transformer-based Nanopore Basecaller on GPUs, 2023 (CCF-B) [paper]
[IEEE TIM] Zuhao Liu, Huan Wang, Yibo Gao, Shunchen Shi, Automatic Attention Learning Using Neural Architecture Search for Detection of Cardiac Abnormality in 12-Lead ECG, 2021 (SCI-II) [paper]

Projects

Scheduling Framework for Commercial PIM System 2024.1 — 2024.6

  • Develop a scheduling framework to enhance the execution efficiency for data-intensive applications in CPU-PIM system.
  • Design the workload modeling and performance estimation method to optimize the CPU-PIM collaboration.

Accelerating Time Series Analysis on Commercial PIM DIMM 2023.10 — 2024.2

  • Accelerate TSA on UPMEM PIM DIMM and characterize the performance of the TSA application on UPMEM.
  • Explore the effect of additional computational resources on DIMM PIM for accelerating TSA.

Architecture Design and Implementation of Stream Data Accelerator 2022.1 — 2022.6

  • Design the hardware accelerator for optimizing stream processing in data center servers, solving the overhead and latency caused by data movement and network packets processing.
  • Implement the RTL design of key components based on an open-source 10Gbps NIC and build the testbench for verification and evaluation.
  • Results show the design reduces the latency of a single step by 6x for the system with 4 nodes. For different sizes of parameter data, the execution time is less than CPU.

Skills

Programming: Familiar with operating Linux systems. Proficient in C, C++, Python, Verilog, and using simulation and synthesis tools.

Languages: CET-4: 619, CET-6: 597, IELTS Overall: 7.5

Other: Experienced in basketball; certified as a National Level 2 Basketball Referee.

Honors

  • 2023, 2024 UCAS Merit Student, 2025 UCAS Outstanding Merit Student
  • 2024 First Class Academic Scholarship in UCAS
  • 2023 Second Class Academic Scholarship in UCAS
  • 2020, 2021 National Scholarship (Top 4 in 279 students)
  • 2022 Sichuan Province Outstanding Graduate (Top 8 in 550 students), Outstanding Graduate of UESTC

Additional Links

Social Links

  • Github: https://github.com/jglovier/resume-template
  • LinkedIn: https://www.linkedin.com/in/joelglovier
  • Instagram: https://www.instagram.com/shunchen_shi/profilecard/?igsh=MWJhYWtsdHhyb2szYw==